Communications Power Inc. CP2000 Base
Documentation Project

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Section II

1. Method of Frequency Selection
The front panel switch SW 1001 provides the binary coded decimal (BCD) outputs corresponding to each digit of the channel number selected. Data from the channel switch also drives the LED displays. IC's U900A and U900D convert the BCD information into the format required to drive the seven segment displays (LED's) U900B and C.

BCD coding is as follows for each decimal number:

Number
C8*
C4
C2
C1
0
0
0
0
0
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
9
1
0
0
1

*C1, C2, etc., correspond to the 1's, 2's, etc., place in the binary equivalent of each digit of the channel number. Note that each decimal digit is binary coded, not the entire number. C11, C12, C21, C22, etc., are the "bits" of C2, the second digit of the channel number.

Also note that TTL negative logic is used for the channel switches. 0 = 2.5 to 5 vdc and 1 = 0 to 0.6 vdc. The radio operating frequency is determined as follows:

N is a three-digit BCD number (NlN2N3) determined by feeding the channel switch outputs into U60ON (for N2 and N3) and N1 control circuit (for Nl). U60ON requires negative voltage for proper operation. This is done by feeding a 50 KHz pulse from the synthesizer into the circuitry of U600M, Q616, Q617 and Q618. The BCD number N is a nine's complement BCD number. This is coded as follows:

Number
N8
N4
N2
N1
0
1
0
0
1
1
1
0
0
0
2
0
1
1
1
3
0
1
1
0
4
0
1
0
1
5
0
1
0
0
6
0
0
1
1
7
0
0
1
0
8
0
0
0
1
9
0
0
0
0

Note that positive TTL logic levels are used for N. Thus, 0 = 0 to 0.6 vdc and 1 = 2.5 to 5.0 vdc.

2. BFO Inhibit Control
Logic gate U600M, together with Q604 and Q605, turn off the BFO during AM receive operation.

3. Crystal Oscillators
All crystal oscillators are of the Colpitts type. Some oscillators operate only in certain modes: (See following page.)

Oscillator On Modes
12.803 MHz (Q614) USB
12.800 MHz (Q610) All modes
10.200 MHz (Q606) AM, LSB
10.197 MHz (Q602) USB

The front panel clarifier control (R508) adjusts the DC bias on D608 (12.800 MHz oscillator) and on D605(12.803 MHz oscillator) to adjust frequency during receive operation only.

4. General Theory of Digital Synthesizer
The voltage controlled oscillator (VCO) is a free-runing oscillator whose frequency can be shifted by changing the DC control voltage applied. Increasing control voltage causes higher frequency of operation. The output of the VCO is mixed with a fixed crystal oscillator to produce a lower frequency for digital division. The output of the digital divider is compared with a fixed reference frequency. A difference in frequency will cause the phase comparator to shift the VCO DC tuning voltage until the VCO is on frequency (locked).

An example will best illustrate this operation. If radio operation on 27.00 MHz is desired, the synthesizer output must be 16.8 MHz (since the radio IF frequency is 10.200 MHz). The 16.800 MHz is mixed with the 12.800 MHz fixed frequency to produce a 4.000 MHz frequency out of the synthesizer mixer. This 4.000 MHz is applied to the programmable divider and divided by 800 to produce 5 KHz. This 5 KHz is compared with 5 KHz produced by dividing the reference oscillator by 2560. Thus, synthesizer output frequency is as follows: fout - 12.800 MHz + N (5 KHz). It can be seen that a change of N by one will produce a 5 KHz shift in operating frequency.

5. Detailed Synthesizer Operation
The VCO (Q608) is automatically tuned by varactor D604 and manually set by L603. Its output is low-pass filtered by C615, L604, C616, and applied to output buffer Q609 and loop buffer Q612. The output of Q612 is applied to loop mixer Q617. The other input to Q611 is the output of the 12.803 MHz (Q614) oscillator for USB. During USB operation, the output of the 12.800 MHz oscillator (Q610) is kept from the loop mixer by switch U600F. For LSB and AM, Q614 is turned off, and U60OF switches Q610 output into the loop mixer. Both oscillator outputs are low-pass filtered by C641, L606, C642. Q611 output is low-pass filtered by C623, L605, C624 and converted to TTL level pulses by Q615. Q615 output is applied to the programmable divider which consists of U60OG (N3), U600H (N2) and U600J (N1). The programmable divider output is applied to the phase comparator (U600A and U600B) which compares the pulses with the 5 KHz output of the reference dividers U600E (÷16), U600D (÷16),and U600C (÷10). The output of the phase comparator is level shifted to 10volt pulses by Q613. Note that the phase comparator output, when the loop is locked, consists of 5 KHz "square" wave, the duty cycle of which is proportional to the VCO DC tuning voltage required for operation at the given frequency. If the phase comparator output is at 0 or I logic levels and does not have a pulse output, the loop is not phase locked. The pulse output o- Q613 is filtered by C603-607, L601, and L602 to produce a smooth DC tuning voltage for the VCO. 8607, 8609, and C608 form a gain compensation network to assure loop stability.

6. BFO
Two crystal oscillators are used for the BFO. The 10.200 MHz (Q606) is used for AM and LSB. The 10.197 MHz oscillator (Q202) is used for USB only. Both oscillator outputs are low-pass filtered by C664, L607, C667 and amplified by Q607. The output of Q607 is fed to the double balanced mixer (D610-D613) which is the product detector for SSB receive operation and the balanced modulator for AM and SSB operation. 8699 and D614 form a network for carrier reinsertion during AM transmit operation.

7. Reference Oscillators
A crystal oscillator (Q610) operating at 12.800 MHz is used as the primary reference for the PLL circuitry. Additionally, the 12.800 MHz is used as a L.O. signal to mix with the 16.800 MHz VCO which yields a difference frequency of 4.0 MHz. The 4.0 MHz is applied to the programmable divider chain whose output is 5 KHz. To maintain a constant 27 MHz output frequency on USB a 12.803 MHz crystal oscillator (Q614) is used as the above mentioned L.O.. Furthermore, a voltage variable capacitor is incorporated in each oscillator circuit to allow ± 800 Hz fine tuning of the receiver with the front panel CLARIFIER control 8508.

During transmit the front panel CLARIFIER control does not function. Each side of the control 8508 is connected through its respective switching transistor Q505 and Q506. In the transmit mode both Q505 and Q506 are turned off which effectively floats the arm of 8508. This prevents the user from warping either oscillator during transmit.

8. Basic Theory of R/T Operation
The radio is basically a single-conversion superheterodyne type unit with filter type SSB generation. Some commonality is used on key components for both transmit and receive. One key unique feature of the unit bears some explanation for thorough understanding of radio operation. A single crystal filter unit is used for all modes of operation (AM, LSB and USB) on both receive and transmit. The filter is a dual mode type with an AM mode centered at 10.200 MHz and an LSB mode with the carrier at 10.200 MHz. For USB operation it is necessary to shift BFO operation down 3 KHz to the other side of the filter (10.197 MHz) so that the filter will pass the upper sideband. If the BFO has been shifted down 3 KHz for USB, it is necessary to shift the SMO LO input up 3 KHz to maintain a constant channel frequency. This is why two oscillators (12.800 MHz and 12803 MHz) are used in the synthesized master oscillator (SMO).

9. Detailed Receiver Operation
C117-C123 and L105-L108 constitute a low-pass filter at the rf input connector which is shared with the receiver and transmitter. From the lowpass filter, the receive rf input is coupled by C116 to D105. D105 is a PIN type diode which acts as a shunt attenuator for manual and automatic rf gain control on receive and as a shunt shorting switch for transmit operation. C250, C251, C252 and L209 provide the required impedance transformation for the grounded gate preamplifier Q223. L210, C255 resonate at 27 MHz on the output of Q223. This output is fed into the gate of JFET mixer Q201. The source of Q201 is fed with local oscillator signal by Q206.

The 10.200 MHz IF output of Q201 is fed through a delay network, consisting of L211, L214, C296, C297 and C258. The delay network is required to insure proper operation of the noise blanker. Output from the delay circuit goes to the crystal filter F-201 via diode switch D203 and D204. For SSB operation, +10 vdc is applied through 8245 to FL201 to change the filter to the SSB mode. The output of FL201 passes through diode switch D205 and is amplified by U200A and U200B (about 80db of IF gain). For SSB operation the output of U200B is switched by D211 into the product detector into the product detector (BFO). Q214 is the AM and AGC detector. Q216 is connected as a temperature tracking diode to bias Q214.

The output of Q214 is low-pass filtered by 8301, C288 to provide audio and a DC voltage for AGC operation. This DC component is applied to comparator U200E. 8306 sets the comparison voltage for U200E. The output of U200E drives follower Q212 to provide fast attack of C277, 8297 and 8298 set the AGC decay. In the AM mode 8298 is shorted by Q217 which shortens the decay characteristics of the AGC. 8283 and 8281 apply AGC to the IF amplifiers. U200C compares the IF AGC level set by 8292 to begin rf AGC. 8298 and D208 assure full receive rf AGC shutdown during transmit. Q208 is the PIN diode (D105) driver.

AM recovered in detector Q214 passes through automatic noise limiter diode D214 and associated circuitry before reaching Q219. The ANL can be turned on and off with front panel switch SW502. Q219 is a FET switch which,selects either AM or SSB audio for amplifier U200F. 8314 is to balance AM/SSB audio levels into U200F. The output of U20OF goes through squelch gate (Q215) to the output amplifier.

U200E senses a DC IF AGC level set by the front panel squelch control (R809) to open the audio squelch gate Q215. U800C and associated circuitry amplifier the audio from U20OF to a suffient level for driving a 4ohm speaker.

10. Detailed Noise Blanker Operation
A TRF (Tuned RF) receiver operating at 23.5 MHz samples the output of the low pass filter located at the antenna input to the transceiver. This TRF receiver consists of rf amplifiers Q 401 and Q403 followed by a noise pulse detector Q405 and Q402. The output of the pulse detector drives a one-shot (Q404) which drives a shunt rf switch Q224. During the period of time an interfering noise pulse is present the switching transistor Q224 prevents the signal from passing through the receiver's i.f. amplifiers. As a result objectionable noise pulses are removed from the receiver's audio output.

11. Detailed Transmitter Operation
Microphone audio is amplified by Q501 and is followed by U500A which is a high gain low distortion amplifier. When overdriven the output of U500A symetrically limits the audio level applied to the compressor which prevents overmodulation. 0507 and C512 determine the amount of audio pre-emphasis introduced by the amplifiers. The audio after amplification and pre-emphasis is applied to U500B which is connected as a logarithmic amplifier. This amplifier introduces a non linear transfer characteristic and produces compressed audio at its output. A front panel switch SW 504 selects between normal and compressed audio for transmitter modulation. The output of U500B drives AGC amplifier U200D which feeds emitter-follower Q221 to provide a low-impedance audio source to the balanced modulator.

The output of the balanced modulator (10.200 MHz) is fed to diode switch D211. Note that 8699 and D614 in the balanced modulator form the key elements for switched, variable carrier insertion during AM transmit operation. The output of switch D211 is buffered by 0222, passed by switch D206, and filtered by dual mode filter FL201 (see previous sections for details of FL201 operation).

The output of FL201 passes through switch diode D204 and is buffered by Q205. The output of buffer Q205 is amplified by AGC driver Q207 and detected by D201 and D202. The DC level output of D201-D202 is compared to a fixed +2 volts by U200C. The transmit IF signal level is set by 8274 before buffer Q222. The output of U200C drives emitter-follower Q209 for a fast attack of C222 and 8229 which set the transmit AGC attack and decay time. Q209 is an emitter-follower AGC driver to the transmit audio AGC amplifier U200D. Thus, adjustment of the audio gain through U200D adjusts the rf level through the transmit IF chain, to prevent overmodulation and level the varying audio input levels from the microphone.

The output of Q205 also is passed through buffer Q203 to the gate of the transmit rf mixer, JFET Q204. The source of Q204 gets LO injection (16.8 MHz) from amplifier Q206. The output of Q204 (27 MHz) is bandpass filtered by C205-209 and L202-L204.

A broad band amplifier consisting of buffer Q225 and push pull amplifiers Q226 and Q227 follows the three section transmit filter. Class A biasing is employed on all three devices to insure very linear operation. Interstage transformer T502 and output T501 provide optimum impedance transformation to following stages. An output filter L201, L205, and associated capacitors removes all out of band spurious energy. This filtered drive signal is applied to 8205 which sets the rf drive level to the linear transmit power amplifier assembly.

The transmit power amplifiers Q101 and Q102 are operated Class AB with transformer interstage matching. Q102, the final rf amplifier. is operated Class B with quiescent DC bias set by 8107, 8108 and temperature tracking diode D104. Q102 also uses transformer type input and output matching. The output of Q102 passes through a 9 section low pass filter which insures complete removal of undesired harmonic energy. Between the output of the filter and antenna terminal T104 and T105 are connected in a directional coupler configuration. The resulting output is detected by diodes D101 and-D102 to give forward and reflected power information. A front panel switch SW 505 selects between the two DC voltages (fwd and refl) before application to VSWR meter amplifier U500C. A sample of the forward power DC voltage is used to drive the rf power output meter and associated drive circuitry.

12. Detailed Power Supply Operation
The power supply circuits provide the operating power for the various modules in the transceiver. Electronic regulation is used to provide stable, low ripple output voltages of +5, +10, and 13.6 VDC.

AC power is applied to the primary of T801 through line fuse F801 and POWER switch SW 801A. The secondary AC voltage of T801 is applied to the bridge rectifier assembly D805 and filter capacitors C803-C804 which provides full wave rectified DC for the series regulators. Both the +10 and +13.6V regulators operate in the same manner.. A precision regulator, U800A, drives a series pass transistor Q803 for +IOV and correspondingly U800B drives Q804 and Q805 for +13.6V output. Q801 and Q802 serve as over current shut back switches for the protection of the regulators. The +5V regulator, U800D, derives its input voltage from the center tap of T801.

For DC operation from an external +13.6 volt source, power is applied to the input of the +5 and +10 regulators. Also, the external DC is applied directly to the audio PA and the RF PA module. D802, D803, and D804 route the external DC to the proper points in the regulator circuitry.