For Best Results:
Remember to include the Diode's inherited Voltage Drop , can also provide the mechanism to increase the Voltage pressure rise in a given direction - so some changes in performance will have to considered as thermal.
While other events that the Diode will exhibit is; in it's Conduction as the Signal gets rectified within it - an effect similar to Avalanche, it is in it's forward Conductance - where the Electrons "jump" or can move thru the gap...into the opposite terminal and out the Diode on the opposite end. Once the gap is crossed, the band gap valence or ability to transfer across is now easier and allows more electrons to migrate across - this can cause a drop in voltage thru a resistor in this divider. A small change but can have an impact, both Positive (Favorable) and Negative (undesired) consequences as you work towards making the Divider balance the work effort to the work load.
.
One thing of many, to keep in mind...
[ATTACH=full]43094[/ATTACH]
...Current when the Diode conduction makes the Voltage rise...
...Everything is all Fun and Games until the Signals' get hurt...
(The Graphic shows Thermal slope inclusive.)
What is being shown here is when the Diode finally rectifies enough signal to make the Diode not only show POLARITY, but the Rectification it performs, changes into power (now has current) and input signal present can degrade from this now DC-based power curves' appearance.
It is when the Diode conducts and completes the Divider as part of the circuit - you need to take in consideration of the amount of power entering in thru the Input Capacitor. The input levels must maintain a specific level range so you don't force the Diode to rectify too much of the input signal into a power that can't be used in the Bias circuit; instead it's wasted as rising voltage that lowers the Input Capacitors'' ability to transfer the input signal into the Circuit, instead the circuit literally drowns in it's own DC-circulating current from the Rectification the Diode performs.
This can work as an advantage to a point, but you cannot recover the input signal from it. The secondary event is the Latching that the MOSFET does in response to this voltage rise. This is the degradation of signal mentioned in this article. A loss of the ability to amplify. It simply "Latches up" and all the power present for RF at the Drain to Source terminals passes thru the part until the condition is removed, power to the part is turned off or the part self destructs.
So in choosing the values for the Divider, you need to take into account the range of input signal - the dynamics. Make sure you have enough of an input signal to obtain the Gates' Turn On Threshold and hold it on thru the duration the transmission.
Gate Capacitance can play a role here, if the Gate charge region is small, the effort it takes to put in and remove power (as a transfer of charge yes, a current within the device that flows and stays with the Gate and it's lead-in) is also less, it doesn't take a lot of effort.
This is an important factor for choosing the right MOSFET for the job. You can find the information in the devices' Datasheet;
[ATTACH=full]43097[/ATTACH]
It is important to look for this information. It will help in making this a successful conversion and since the IRF520 is the "Go-To" now for many radios, using this information contained here can help us develop a "template" to find others and their designs they used for BIAS support.
In the DYNAMICS section, you see Input Capacitance which will be the most pivotal of any of the values you see in the chart above.
- The greater the Input Capacitance - the slower the work output will be, this is a factor of performance - Small signal input linearity will be degraded in the HF band we're looking to use this part in. This number is what your Input Capacitor may need to be to overcome the inherited traits of capacitance on a plate (Gate) that affects the tuning and Useable Signal in both Frequency and Amplitude (signal level)
In the SWITCHING sections, you see the Rise RATE as Turn On time Delay , and Rise Time. Both values are important. One is the ability of how fast the device turns on, as if it were a switch (pulse) and the Rise Time is the ability of the Switch to form a Pulse - more square and not a triangle or sine wave.
[ATTACH=full]43108[/ATTACH]
- Switching times may be FAST, but does little good when you have to use large level input signal power to attain and force the Gate to even turn on and faithfully follow the input signal simply due to the Frequency of interest is above the MUF due to Large Gate Capacitance.
- The Rise and Fall times are Rates in which the substrate can track the input signal.
- Slow Fall times show up this Gate performance issue and affects or skews the output appearance of the signal - its' not linear nor symmetrical.
- To determine the "Rise and Fall times" or MUF and the SOA (Maximum Useable Frequency Safe Operation Area) these two go hand in hand for as the rise time may be short, but if the devices' Fall time is too slow, the part remains "on" for longer periods of time - and this affects the Duty cycle as the ability to dissipate power thru the device and keep operating linearly.
To determine the periodic time or amount of time to complete one cycle, it's simply ...
[ATTACH=full]43101[/ATTACH]
F is your Frequency - T is the time value.
F = 27,000,000 - so what is it's time?
T = 1 / 27,000,000
Periodic of F for 1 cycle is...
T = 0.000000037037 sec
or ~37 nS (Nano seconds)
So we have a working value of time to offer the charts...
Beginning to see how this works?
