To continue...
It is in this fashion of design, we are now adjusting the Threshold of the Gate and as to when it turns on using a STATIC DC voltage applied thru a Buffer resistor to offset the RF waves own limitations of being a highly dynamic signal in Range of power that will make it difficult to self-bias using the Didoe Resistor combinations alone.
- The Potentiometer is a 47K some designers would consider rather high, but this Bias design is important to remember when dealing with Non-Linear devices in a fashion that requires their operational character to be closer to Linear as this radio uses SSB which works best in Modes above Class B/C - more into Class AB - you need to provide a power path to flow for the Route for the ON condition and offer plenty of room in Voltage Range in a "High Impedance state" meaning just the Voltage as a potential balanced off with little to no current (uA versus mA) flow so as to preserve the integrity of the RF signal being applied to the Gates.
- The Driver itself in this application, has considerable Input Capacitance is PARALLEL to add capacitance (Sum together) so that RF power flows into and can overcome the Gate Voltage held higher by the resistive effects the Potentiometer adds in an Effective Impedance value. Increasing Input Capacitance to overcome the Gates own Capacitance is one way of overcoming these limitations.
- In light of the Driver: They also incorporate a Diode to apply a thermal profile to track the heating effects, but by need, it's also included in the RGoff (or Grounded) side along with a Bypass capacitor - to reduce Inductive effects that cause loops to form. This also reduces the Voltage spikes that forms from excessive or strongly compressed RF Envelope power arriving from previous stages, including a Bipolar that is part of the TX strip and is operated in it's Linear range the Bypass is AFTER a 4.7K resistor as the Resistor is placed to position itself as an Impedance to the RF input as well as the Current placed on the Gate from it's own Gate Capacitance and Charge level.
- In the Finals own Gate Bias circuit, several methods are applied in which to REGULATE the Bias condition so the Gate drive levels are not exceeded, as well as the Gate Current in both RF Signal and DC voltage are kept within limits so the Device does not self destruct or Saturate on in a condition known as "Latching" which will destroy the device because it's "stuck on" and won't turn off no matter how much Gate Resistance to quench this event is applied.
- Instead: to protect from a previous stages' amplified signal from exceeding limits, the Gate Bias used in the FINAL stage is a three-point process using a buffered Resistive Gate bias feed of 4.7K, a RF Bypass Capacitor, a Variable Potentiometer adjusts the Gates THRESHOLD voltage - of when to turn on, and a set of 3 Diodes arranged in Series to lower the Bias voltage with current limiting thru a 680 ohm resistor - along with a Voltage divider of 1K and 330 ohms, to provide less current but apply a voltage presence to the gate thru the 3 didoes arranged in series to be forward biased to ground.
- This is effective in both the Voltage Regulation Rise the Didoes own Voltage Drop in their junctions acts upon the voltage and stabilize this as both an Intrinsic (Semiconductor) inherited Voltage Drop that RAISES the intrinsic effect of the voltage presence available to use by the Gate - but also provides a form of Thermal tracking being in close proximity to the Final but not connected directly to it except thru the Gate and that is thru a Filter capacitor and the 4.7K Buffer Resistor similar to the Driver in function.
Referring to the Graphic in the Post above, locate D210 and R218 (1K) - note how they are positioned to tap into the OUTPUT of the AM Regulator.
Note also the Diodes orientation.
- It is set up to flow INTO the AM Regulator Bias line if and when the Audio Bias line drops below the threshold of where D210 can be forward biased, into this AM Regulator output line.
This design provides a form a Regulation for the Gate - the Voltage presence drops by a factor of the loss across the divider that feeds into the 3 diodes and that Variable potentiometer. - changing the amount of Voltage present to the Gate thru that 4.7K Buffer Resistor.
IF the modulation is excessive, as if it were a heavy modulated envelope of power, the Audio signal pressed into this bias line, is an AC signal biased to close to 5.6 to as much s 8 volts - and can drop to as low as 2 volts.
In SSB and FM modes, this is a moot point, no true audio signal is imposed on the output line from the AM regulator. The output from the AM regulator is pure DC adjusted for the Final and Driver to output proper signal drive level for the output carrier - it simply sends DC to the Driver and Final at the appropriate power level to drive signal for the Gates' to process - not the Drain to Source wildly swinging signal to show a a complex impedance load.
It's when the Envelope power exceeds the required input voltage offset (Above ground) to remain forward biased can the power present to be amplified at the Gate, can be strong enough on it's own merits even without applied DC voltage - it may damage the device from exceeding not VGS, but a Gate to Drain or Gate to Source (reverse bias) voltage condition.
This condition can generate several problems with the MOSFET - with a major one being the ability to recover from heavy voltage loss across the Drain to Source that the Gate can exceed the Input Voltage to the Drain, and can permanently damage the device.
- An answer to this condition can be found in this snippet, Final Bias circuit using R292 and D221 - they got to the AN612c equivalent or NJM2954 and Q210 handles the Audio that enters into this Balanced Modulator amp/mixer - also grounds BIAS line as discussed in the Graphic.
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As a precaution, in AM mode, the Radio is designed to make the Gate voltage fall below a level that when the Input power swings enter from the Driver - the Gate does not turn on as quickly as it would have if the heavy modulation conditions didn't occur. The Bias circuit and Gates' Capacitance affect the input level to lessen - or compress - the swing into a lower power drive level reflected at the output of the Final.
Remember The Following:
The modification parts and procedure
can change without notice.
If you perform the Mods and find they don't work,
Review the above - this is a guide,
- we cannot be held responsible for damages
caused by improper install or willful abuse of the
information these pages contain.
