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I think the problem has to do with the DC biasing on your first single-ended transistor driver. Since it is single-ended and NPN, I don't think it should be powered from the same split rail Supply that is feeding the complementary symmetry outputs. If I suspect what is happening is correct, your output will be flat topping right at the output of that first transistors collector.


If no other Supply is available other than the plus and minus 3 V, you may get better results if you bias the first transistor up, so that the collector voltage is at 1.5 volts, with no signal. I'm having a hard time seeing how the transistor can swing negative, unless it's in the middle of the positive voltage available. My theory would be supported, if you see one side of the waveform, clipping well before the other.