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TR16 - E is the Left pin, C is Center pin, B is the Right. B should be about 0.6v to 0.7v above E voltage.
Red trace is from the LD pin (15), to JP2 under the PLL IC, then continues towards the back through R102 (3.3k), to D14 (low LD state disables TX Mixer) and to R62 (2.2k) which provides Bias to TR16. If LD High state, should enable the TX Buffer (or sometimes called TX Pre-Driver), and a LD Low state disables TX.
Try this: Remove R102 (3.3k), set aside to put back later (already pre-bent to correct shape and length), and put another 3.3k from the left trace where D14 or R62 are on that trace, to either JP31 (next to L20), or JP32 (feeds +8v TX to Collector of TR16 through L17), or to JP29, next to L17.
This disables the LD lock-out of the TX. See where (if at all) it transmits on what frequency.