Nice. And I always thought FETs had a negative temp coefficient. And maybe that's just the resistance of the channel, not the behavior of the gate bias.
Hmm.
Seems to me putting two or more series diodes in the trimpot's ground return would increase the compensation. Each diode will add it's own increment. Seems like that would help. Mounting them across the face of the transistor body would improve response speed.
Never have tried it.
73
LDMOS FETs can have a positive coefficient (resistance increases with heat) at low drain currents and lower operating voltages, but at typical operating levels in the linear mode, the coefficient becomes negative (resistance decreases with heat). This seems more prevalent in higher voltage, power output devices and is the reverse of what we see with typical FET's.
Mounting bias diodes across the face of a ceramic cased transistor works very well at accurately tracking thermal variations since the ceramic material reacts to changes in heat very quickly with respect to the die temperature. One you encase a high power die in plastic, there is an inevitable delay in the temperature transfer time through the case and the bias lags in its ability to quickly track these changes.
If you're on a copper heat spreader, you can usually get away with mounting the diode to that spreader and close the the FET. When working with aluminum that has half of the heat conduction ability, you're back to the same type of lag in thermal tracking again. Most 50 volt devices can tolerate these variables while experiencing a maximum of about twice the normal bias current in worse case conditions and without going into a self destructive thermal runaway condition (provided that you're not over-driving it too).
As transistor operating voltages increase beyond 50 volts, the chances of self destructive thermal runaway increase exponentially without a bias circuit and sensing that instantly tracks the direction and amount of change in the die temperature. Those higher voltages also cause the gate impedance to drop like a brick on high power devices. If you can match the RF drive to that impedance, you now have a new problem contributing to thermal runaway with very poor IMD and linearity.
All conventional bias circuits can be modulated by any changes in this unusually high current RF drive level! Negative peaks of any modulated carrier will force the transistor into premature RF cutoff. Any positive modulation excursions of the DC bias beyond a few tenths of a volt, will instantly over bias and destroy the transistor. They jump into thermal runaway like a switch and even the complete removal of RF drive cannot break the cycle once it starts. These problems proved to be formidable tasks when designing the new line voltage operated linear pallets. They are very difficult to measure and trace due to all of the stray RF present within an energized circuit.
To me, the most interesting question is how can the same device transition between a positive and negative temperature coefficient, just based on the voltage and current applied through it? The transistor manufacturer talks all about "holes" and "carriers" and how at a certain point one "layer" overcomes another and the coefficient inverts. To be straight forward, I'm still at a loss as to why all of that happens and am just thankful I've figured out the circuits to compensate for the transistor characteristics I've yet to fully grasp.
