ERF 2030+ are an evil lot...
Not just saying it as a metaphor, but in actuality - it fits the facts...
You have to remember the original design the AN-2030 - came from older days of needing an Automotive Spark Plug "trigger" that had nearly 0 ohmic drop with hardly any inductive effects of Ringing - since you were already using a highly inductive coil on top of the spark plug.
Don't believe me - go locate some older ECM from some vehicles in a junk yard dated about 1995 to 2005 - they too used AN types - why AN prefix, because they were commonly used around Little fuse and their umbrella of companies...for automotive purposes.
Anything from relay latching onto the spark plug and pulse width modulation for lamps and lighting and any type of sensor networks. Littlefuse and AN worked hand in hand and that's not bad...
But these newer 2030+ are a different beast and as others and myself included - have found out that the level of DRIVE required to turn the beasts on, rivaled that of the V-MOS designs - ok did you catch that? TRENCH MOSFET designs. The type of designs that the Gate channel is grooved into the die amidst the substrate and makes them more linear.
EKL or whomever didn't seem to didn't follow that success with their first batch of the MOSFET designs - so these seem to be from another supplier - I just can't verify the V in the V-MOS - but the operation of this device fits that profile.
In the power or V-MOSFETs the channel length is determined by the diffusion process, while in other MOSFETs the channel length depends upon the dimensions of the photographic masks employed in the diffusion process. By controlling the doping density and the diffusion time, much shorter channels can be produced than are possible with mask control of channel length. These shorter channels allow much more current densities which again contribute to larger power dissipations. The shorter channel length also allows a larger transconductance
gm to be attained in the V-FET and very considerably improves the frequency response and the device switching time.
Excerpts from:
http://www.circuitstoday.com/v-fet-or-power-mosfets
With the above being said, you have to look at the ERF-2030+ as a derivative of this method. To what flavor and extent? Well, take a look at the amount of capacitance that must be used now to obtain any linear drive level.
The efforts we have to make to obtain any sort of working power output makes me think that the parts that the 2030+ is, is from another supplier else our problems would have been far less than they are now.
Before - your AN-2030 or EKL-2030 required only that your existing capacitance parts be used and didn't require much fiddling with the BIAS to make it work - in fact, your Bias levels REQUIREMENT were far less power. And so the voltage / current needs were switched - from high-current low voltage bias of a diode threshold level - your P-N junction of a BI-POLAR onto now, a floating ON- voltage that was and is just below the Gate's Turn on voltage. We went from a high-current-low impedance path onto a high-impedance-low-current path which translates into a voltage requirement more than a current regulated at a specific voltage threshold.
What does this translate to? Higher levels of capacitance to the input admittance - or since were looking at the voltage components more than the current ones - you don't want your V-MOS design running - fluttering in a Class C mode like you'd get from non-biased designs of older Bi-polars - so you applied a higher voltage to the Gate - fantastic! But you forgot to adjust the input power to the bias ratios too.
Ratios? Yes, the Gate needs a voltage to turn on, and if you are running certain types of MOS designs, they require a Directional voltage - one that can give the Gate region (your V) enough field strength to turn on and REMAIN on - to make the substrate flow from Source To Drain (Or Drain to Source). So you don't reverse-bias the gate region else the field can collapse and you then run into a threshold issue again.
So to better define this...
You're trying to use an RF field at the same time you're using a Gate Bias DC voltage to force the part to turn on, and now you want it to follow the RF wave present in this same realm, the RF imposed over the DC state - which would be ok until the VECTOR of the RF wave places the inception power of that moment in time - below the threshold on stage - which will skew, if not clip - the output waveform - there lies the problem. Certain designs didn't like the vector of RF or any power - below that of a given on-level - and with high current switching power flowing underneath - this may seem a moot point but the effort they maker placed in making the trench-design work as well as it does - brings you to this brink
In the Bi-polar era - we saw things pretty plainly as Class A, AB or Class C - with D and others arriving as a methodology of application of power not just to the Base - but to all the parts of the transistor involved.
We don't get that luxury in the MOSFET realm. It is now done internally and we have to design around that. The Biasing we could do before as current - is now highly interactive within the part itself so we have to obtain and utilize windows or dynamic level ranges of signal that can be applied and yet operate the device linearly as possible.
Not necessarily by using excessive gate capacitance. But to use enough capacitance and power level range of signal (your dynamic element) to affect just the interaction of the Gates DC source bias and the RF power - becoming more of a VECTOR problem - not V-channel design per-se - but a directional or Vectoring of how to allow RF to be shaped in the output (from full peak to full trough) and keep it linear and yet forward amplification without cutoff .
Remember, before MOSFET we did all this with a diode and told the Bipolar to "stay on" only if RF was present and we got away with some cutoff by refueling the absent portions of the wave with a capacitive event we called Miller-effect.
- In the realm of the Gate - you can't - you have to push enough voltage to keep the part just off - only Turn-on when RF is present - but also to remember the RF vectoring will add and subtract power from this threshold voltage to a larger degree due to the high-impedance state of voltage - no current flow.
- This is more of a DYNAMIC range issue - too much power applied can result in this effect. So to keep power lower and within limits allows us to keep DC bias issues from becoming an absence of power to maintain the Gates' on condition. (Lower AVG power levels beyond recovery times)
So we just add a little less resistive element to the divider circuit to allow for more power in to the Gate line, and a slightly less resistive element to remove power from the line. Sounds simple enough right? Well, you'll need that and a bit of luck or a good Scope to help you see this vectoring problem.
But-it can be done. Only it becomes tricky when you have high levels of capacitance - it takes time to apply and remove the charges so you have to tailor the divider to obtain a given result.
So you have been warned.
Your divider will still need high-impedance sourcing and drainage - so that approach, we are ok with. But the ratios needed are highly part design specific as in - one type or configuration can work well for one type of Gate design, but not for all - so you will have to tailor the parts used in this event to make the show work.
So again, you make your divider a high-impedance type - but you may find yourself swapping and interchanging parts more on some MOSFETS' than other types of MOSFETs'. Yes, this is normal (AHEMN) yes, normal - because you have to adjust for a guesswork that the maker of the MOS device will not divulges all the details for you to follow - there simply isn't any - you have to make and take the time to apply the design you have to make it work for the Gate structure involved.
Stay tuned to this for I will be adding more of my notes to this as I go - right now I have some chores and animal husbandry to perform...
So I'm back now, and since I was trying to get this point across - I'm going to leave this here for you...
This is what I use as a GUIDE to help me find the best results from the layout of parts the conversion has left me to work with.
So if you have a 5K trimmer - great! If not, get some - you'll need them along with a 3.9K resistor of fixed value too. Diodes? 1N4148 can do well, follow your figures. But if you try the REGULATED approach, get some 5.6V 1-watt rated types. You can go higher in the Zener voltage but you might want to keep it simple and stay small with the 5.6 volts for now.
Why? Well, the 5.6 volt rating can be applied as a 1/2 value of expected input rated voltage.7.5 volts is about the highest you want to go in ability to rectify as well as provide protection.
Gates of most MOSFET's you can fit in there are rated inputs of about 20 volts Positive or Negative - peak. So with 5.6 volts, you're close to about 12 volts on same side of the diodes direction - so when it rectifies, do remember to add in the RF potentials in Voltage peaks too.
You can also find more research in this thread
MOSFET conversions for upD858 and MB8719 boards - although it pops up on my post, don't forget to review the entire thread - lost of pages - there is invaluable resources embedded within the thread from many great participants and techs - some of the best in the business really - so best to take a moment and look into that thread too